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130
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HPCA
2008
IEEE
16 years 4 months ago
Supporting highly-decoupled thread-level redundancy for parallel programs
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
M. Wasiur Rashid, Michael C. Huang
HPCA
2007
IEEE
16 years 4 months ago
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E...
113
Voted
HPCA
2006
IEEE
16 years 4 months ago
LogTM: log-based transactional memory
Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Implementing these properties includes p...
Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan...
CHI
2004
ACM
16 years 4 months ago
Examining the robustness of sensor-based statistical models of human interruptibility
Current systems often create socially awkward interruptions or unduly demand attention because they have no way of knowing if a person is busy and should not be interrupted. Previ...
James Fogarty, Scott E. Hudson, Jennifer Lai
256
Voted
POPL
2007
ACM
16 years 4 months ago
Dynamic heap type inference for program understanding and debugging
C programs can be difficult to debug due to lax type enforcement and low-level access to memory. We present a dynamic analysis for C that checks heap snapshots for consistency wit...
Ben Liblit, Chloë W. Schulze, Marina Polishch...
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