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DATE
2007
IEEE
145views Hardware» more  DATE 2007»
15 years 11 months ago
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
Riccardo Mariani, Gabriele Boschi, Federico Colucc...
DATE
2007
IEEE
108views Hardware» more  DATE 2007»
15 years 11 months ago
Speeding up SystemC simulation through process splitting
This paper presents a new approach that can be used to speed up SystemC simulations by automatically optimizing the model for simulation. The work addresses the inefficiency of th...
Youssef N. Naguib, Rafik S. Guindi
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
15 years 11 months ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
ICASSP
2007
IEEE
15 years 11 months ago
Fingerprinting to Identify Repeated Sound Events in Long-Duration Personal Audio Recordings
Body-worn solid-state audio recorders can easily and cheaply capture the bearer’s entire acoustic environment throughout the day; we refer to such recordings as “personal audi...
James P. Ogle, Daniel P. W. Ellis
ICASSP
2007
IEEE
15 years 11 months ago
Using Structural Similarity Quality Metrics to Evaluate Image Compression Techniques
Perceptual image quality metrics have explicitly accounted for perceptual characteristics of the human visual system (HVS) by modeling sensitivity to subband noise as the just-not...
Alan C. Brooks, Thrasyvoulos N. Pappas