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» MetaCores: Design and Optimization Techniques
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ISLPED
2005
ACM
111views Hardware» more  ISLPED 2005»
15 years 3 months ago
Peak temperature control and leakage reduction during binding in high level synthesis
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
DAWAK
2005
Springer
15 years 3 months ago
DWEB: A Data Warehouse Engineering Benchmark
Abstract. Data warehouse architectural choices and optimization techniques are critical to decision support query performance. To facilitate these choices, the performance of the d...
Jérôme Darmont, Omar Boussaid, Fadila...
FPGA
2003
ACM
116views FPGA» more  FPGA 2003»
15 years 3 months ago
Hardware-assisted simulated annealing with application for fast FPGA placement
To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
Michael G. Wrighton, André DeHon
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
15 years 3 months ago
Taming the component timing: A CBD methodology for real-time embedded systems
—The growing trend towards using component based design approach in embedded system development requires addressing newer system engineering challenges. These systems are usually...
Manoj G. Dixit, Pallab Dasgupta, S. Ramesh
ASPDAC
2009
ACM
117views Hardware» more  ASPDAC 2009»
15 years 2 months ago
Dynamically reconfigurable on-chip communication architectures for multi use-case chip multiprocessor applications
– The phenomenon of digital convergence and increasing application complexity today is motivating the design of chip multiprocessor (CMP) applications with multiple use cases. Mo...
Sudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi