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» MetaCores: Design and Optimization Techniques
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DAC
2003
ACM
15 years 10 months ago
Test cost reduction for SOCs using virtual TAMs and lagrange multipliers
Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski,...
ICCD
2008
IEEE
159views Hardware» more  ICCD 2008»
15 years 6 months ago
A high-performance parallel CAVLC encoder on a fine-grained many-core system
—This paper presents a high-performance parallel context-based adaptive length coding (CAVLC) encoder implemented on a fine-grained many-core system. The software encoder is desi...
Zhibin Xiao, Bevan Baas
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
15 years 6 months ago
Long-term Performance Bottleneck Analysis and Prediction
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...
Fei Gao, Suleyman Sair
ICCAD
2006
IEEE
106views Hardware» more  ICCAD 2006»
15 years 6 months ago
Wire density driven global routing for CMP variation and timing
In this paper, we propose the first wire density driven global routing that considers CMP variation and timing. To enable CMP awareness during global routing, we propose a compac...
Minsik Cho, David Z. Pan, Hua Xiang, Ruchir Puri
SIGCOMM
2009
ACM
15 years 4 months ago
In defense of wireless carrier sense
Carrier sense is often used to regulate concurrency in wireless medium access control (MAC) protocols, balancing interference protection and spatial reuse. Carrier sense is known ...
Micah Z. Brodsky, Robert T. Morris