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» MetaCores: Design and Optimization Techniques
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PLDI
2009
ACM
15 years 4 months ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...
ICCAD
2008
IEEE
130views Hardware» more  ICCAD 2008»
15 years 4 months ago
Area-I/O flip-chip routing for chip-package co-design
— The area-I/O flip-chip package provides a high chip-density solution to the demand of more I/O’s in VLSI designs; it can achieve smaller package size, shorter wirelength, an...
Jia-Wei Fang, Yao-Wen Chang
ICC
2007
IEEE
288views Communications» more  ICC 2007»
15 years 4 months ago
Joint Channel State Based Random Access and Adaptive Modulation in Wireless LAN with Multi-Packet Reception
—Conventional 802.11 medium access control (MAC) characteristics. In particular, all of these designs adopted a protocols have been designed separately from the characteristics s...
Wei Lan Huang, Khaled Ben Letaief, Ying Jun Zhang
ASPDAC
2007
ACM
123views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Coupling-aware Dummy Metal Insertion for Lithography
As integrated circuits manufacturing technology is advancing into 65nm and 45nm nodes, extensive resolution enhancement techniques (RETs) are needed to correctly manufacture a chip...
Liang Deng, Martin D. F. Wong, Kai-Yuan Chao, Hua ...
FPGA
2008
ACM
174views FPGA» more  FPGA 2008»
14 years 11 months ago
Pattern-based behavior synthesis for FPGA resource reduction
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
Jason Cong, Wei Jiang