41 search results - page 8 / 9 » Methods for exploiting SAT solvers in unbounded model checki... |
178
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POPL
2008
ACM
15 years 9 months ago
2008
ACM
Relevance heuristics allow us to tailor a program analysis to a particular property to be verified. This in turn makes it possible to improve the precision of the analysis where n...
FMCAD
2007
Springer
15 years 1 months ago
2007
Springer
Parameterized heuristics abound in computer aided design and verification, and manual tuning of the respective parameters is difficult and time-consuming. Very recent results from ...
CAV
2004
Springer
15 years 2 months ago
2004
Springer
SAL 2 augments the specification language and explicit-state model checker of SAL 1 with high-performance symbolic and bounded model checkers, and with novel infinite bounded and...
118
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VLSID
2010
IEEE
14 years 7 months ago
2010
IEEE
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
CADE
2009
Springer
15 years 4 months ago
2009
Springer
Abstract. The problem of computing Craig interpolants in SMT has recently received a lot of interest, mainly for its applications in formal verification. Efficient algorithms for ...