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» Methods to Improve Coding Efficiency of SP Frames
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DAC
2008
ACM
15 years 10 months ago
Miss reduction in embedded processors through dynamic, power-friendly cache design
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
Garo Bournoutian, Alex Orailoglu
DFT
2009
IEEE
154views VLSI» more  DFT 2009»
15 years 4 months ago
Dual-Layer Cooperative Error Control for Reliable Nanoscale Networks-on-Chip
We propose a framework that allows dual-layer cooperative error control in a nanoscale network-on-chip (NoC), to simultaneously improve reliability, performance and energy efficie...
Qiaoyan Yu, Paul Ampadu
ASAP
2003
IEEE
141views Hardware» more  ASAP 2003»
15 years 2 months ago
Automatic Instruction Set Extension and Utilization for Embedded Processors
There is a growing demand for application-specific embedded processors in system-on-a-chip designs. Current tools and design methodologies often require designers to manually spec...
Armita Peymandoust, Laura Pozzi, Paolo Ienne, Giov...
BMCBI
2011
14 years 1 months ago
The Proteogenomic Mapping Tool
Background: High-throughput mass spectrometry (MS) proteomics data is increasingly being used to complement traditional structural genome annotation methods. To keep pace with the...
William S. Sanders, Nan Wang, Susan M. Bridges, Br...
AUIC
2005
IEEE
15 years 3 months ago
Real-time 3D Finger Pointing for an Augmented Desk
The augmented desk is gaining popularity in recent HCI research. Its layout of a large horizontal screen on the desk enhances immersive and intense collaborative experiences. A re...
Le Song, Masahiro Takatsuka