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FPL
2006
Springer
103views Hardware» more  FPL 2006»
15 years 3 months ago
An Efficient Fault Tolerance Scheme for Preventing Single Event Disruptions in Reconfigurable Architectures
Reconfigurable architectures are becoming increasingly popular with space related design engineers as they are inherently flexible to meet multiple requirements and offer signific...
Sajid Baloch, Tughrul Arslan, Adrian Stoica
135
Voted
ATS
2001
IEEE
172views Hardware» more  ATS 2001»
15 years 3 months ago
A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih...
DAC
2005
ACM
15 years 1 months ago
A design platform for 90-nm leakage reduction techniques
Methodology, EDA Flow, scripts, and documentation plays a tremendous role in the deployment and standardization of advanced design techniques. In this paper we focus not only on l...
Philippe Royannez, Hugh Mair, Franck Dahan, Mike W...
IESS
2007
Springer
92views Hardware» more  IESS 2007»
15 years 5 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
ETS
2006
IEEE
108views Hardware» more  ETS 2006»
15 years 5 months ago
A DFT Architecture for Asynchronous Networks-on-Chip
The Networks-on-Chip (NoCs) paradigm is emerging as a solution for the communication of SoCs. Many NoC architecture propositions are presented but few works on testing these netwo...
Xuan-Tu Tran, Jean Durupt, François Bertran...