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ICCAD
2001
IEEE
113views Hardware» more  ICCAD 2001»
15 years 8 months ago
The Design and Optimization of SOC Test Solutions
1 We propose an integrated technique for extensive optimization of the final test solution for System-on-Chip using Simulated Annealing. The produced results from the technique ar...
Erik Larsson, Zebo Peng, Gunnar Carlsson
GI
2004
Springer
15 years 5 months ago
Towards a Framework and a Design Methodology for Autonomic Integrated Systems
: The transition from microelectronics to nanoelectronics reaches physical limits and results in a paradigm shift in the design and fabrication of electronic circuits. The conserva...
Andreas Herkersdorf, Wolfgang Rosenstiel
ISQED
2003
IEEE
85views Hardware» more  ISQED 2003»
15 years 5 months ago
Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets
An algorithm for mapping core terminals to System-On-a-Chip (SOC) I/O pins and scheduling tests in order to achieve costefficient concurrent test for core-based designs is present...
Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanja...
ASPDAC
2000
ACM
108views Hardware» more  ASPDAC 2000»
15 years 4 months ago
System-in-package (SIP): challenges and opportunities
Abstract - In this paper, we propose the concept of System-InPackage (SIP) as a generalization of System-On-Chip (SOC). System-In-Package overcomes formidable integration barriers ...
King L. Tai
IPPS
2006
IEEE
15 years 5 months ago
Increasing analog programmability in SoCs
—The use of programmability in Systems-on-Chip (SoC) brings as the main advantage the possibility of reducing the time-to-market and the cost of design, specially when different ...
E. Schuler, L. Carro