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FDL
2007
IEEE
15 years 6 months ago
An Integrated SystemC Debugging Environment
Since its first release the system level language SystemC had a significant impact on various areas in VLSI-CAD. One remarkable benefit of SystemC lies in the of abstraction le...
Frank Rogin, Christian Genz, Rolf Drechsler, Steff...
DATE
2006
IEEE
94views Hardware» more  DATE 2006»
15 years 5 months ago
Reuse-based test access and integrated test scheduling for network-on-chip
In this paper, we propose a new method for test access and test scheduling in NoC-based system. It relies on a progressive reuse of the network resources for transporting test dat...
Chunsheng Liu, Zach Link, Dhiraj K. Pradhan
75
Voted
ICCAD
2000
IEEE
95views Hardware» more  ICCAD 2000»
15 years 4 months ago
Test of Future System-on-Chips
Spurred by technology leading to the availability of millions of gates per chip, system-level integration is evolving as a new paradigm, allowing entire systems to be built on a s...
Yervant Zorian, Sujit Dey, Mike Rodgers
DAC
2001
ACM
16 years 22 days ago
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
Li Chen, Xiaoliang Bai, Sujit Dey
VLSID
2004
IEEE
119views VLSI» more  VLSID 2004»
16 years 4 days ago
Rapid Prototyping for Configurable System-on-a-Chip Platforms: A Simulation Based Approach
The design of any application on a configurable System-on-a-Chip (SoC) like Atmel's FPSLIC is subject to a lot of constraints stemming from requirements of the application an...
Jens Bieger, Sorin A. Huss, Michael Jung, Stephan ...