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NOCS
2009
IEEE
15 years 6 months ago
Networks-on-chip in emerging interconnect paradigms: Advantages and challenges
Communication plays a crucial role in the design and performance of multi-core systems-on-chip (SoCs). Networks-on-chip (NoCs) have been proposed as a promising solution to simpli...
Luca P. Carloni, Partha Pande, Yuan Xie
DFT
2007
IEEE
95views VLSI» more  DFT 2007»
15 years 6 months ago
Fault Tolerant Source Routing for Network-on-Chip
This paper presents a new routing protocol of network-on-chip(Noc) called ‘Source Routing for Noc’(SRN) for fault tolerant communication of Systems-on-chip(Soc). The proposed ...
Young Bok Kim, Yong-Bin Kim
FPGA
2006
ACM
90views FPGA» more  FPGA 2006»
15 years 3 months ago
Improving performance and robustness of domain-specific CPLDs
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
Mark Holland, Scott Hauck
110
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CASES
2005
ACM
15 years 1 months ago
SECA: security-enhanced communication architecture
In this work, we propose and investigate the idea of enhancing a System-on-Chip (SoC) communication architecture (the fabric that integrates system components and carries the comm...
Joel Coburn, Srivaths Ravi, Anand Raghunathan, Sri...
DAC
2006
ACM
15 years 1 months ago
Systematic software-based self-test for pipelined processors
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis H...