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ETS
2007
IEEE
94views Hardware» more  ETS 2007»
15 years 6 months ago
An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Therefore embedded memories are commonly equipped with spare r...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
CLIMA
2004
15 years 1 months ago
A New Framework for Knowledge Revision of Abductive Agents Through Their Interaction
The aim of this work is the design of a framework for the revision of knowledge in abductive reasoning agents, based on interaction. We address issues such as: how to exploit knowl...
Andrea Bracciali, Paolo Torroni
DATE
2008
IEEE
174views Hardware» more  DATE 2008»
15 years 6 months ago
Calibration of Integrated CMOS Hall Sensors Using Coil-on-Chip in ATE Environment
Due to high demand for hall sensors mostly in the automotive and industrial applications, development and manufacturing of hall sensors in System-on-Chip (SoC) became more importa...
Mustafa Badaroglu, Guy Decabooter, Francois Laulan...
LCPC
2004
Springer
15 years 5 months ago
Power-Aware Scheduling for Parallel Security Processors with Analytical Models
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...
Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq ...
ISCAS
2006
IEEE
95views Hardware» more  ISCAS 2006»
15 years 5 months ago
Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking
—A low-latency, HDL-synthesizable dynamic clock frequency controller is presented as a time-efficient alternative to full-custom implementations. Frequency division of a fully in...
Robert M. Senger, Eric D. Marsman, Gordy A. Carich...