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ISVLSI
2003
IEEE
118views VLSI» more  ISVLSI 2003»
15 years 5 months ago
Networks-On-Chip: The Quest for On-Chip Fault-Tolerant Communication
In this paper, we discuss the possibility of achieving onchip fault-tolerant communication based on a new communication paradigm called stochastic communication. Specifically, for...
Radu Marculescu
MSE
2003
IEEE
92views Hardware» more  MSE 2003»
15 years 5 months ago
On simulating the IP Market Dynamics in an Academic Environment Using SystemC
As SoC (System-on-a-chip) methodology emerges, IP (Intellectual Property) development and integration will play a major role in the hightech industry. To prepare for this future t...
Ghaiyyur Quraishi, Ravi Shankar
106
Voted
DATE
2009
IEEE
183views Hardware» more  DATE 2009»
15 years 6 months ago
SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips
Three-dimensional integrated circuits are a promising approach to address the integration challenges faced by current Systems on Chips (SoCs). Designing an efficient Network on C...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
ICEBE
2007
IEEE
158views Business» more  ICEBE 2007»
15 years 6 months ago
The Design of A Rule-based and Event-driven Trust Management Framework
In both E-Commerce (EC) and Service-Oriented Computing (SOC) environments, sellers or service providers interact with customers or service clients for services or transactions. Fr...
Yan Wang 0002, Duncan S. Wong, Kwei-Jay Lin, Vijay...
CODES
2005
IEEE
15 years 5 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan