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ISQED
2003
IEEE
86views Hardware» more  ISQED 2003»
15 years 5 months ago
Electrical and Thermal Analysis for System-in-a-Package (SiP) Implementation Platform
This paper presents an electrical and thermal performance analysis of System-in-a-Package (SiP) memory/logic implementation platform based on ChipLaminate-Chip (CLC) technology. I...
Michael X. Wang, Katsuharu Suzuki, Wayne Wei-Ming ...
ESTIMEDIA
2003
Springer
15 years 5 months ago
EPIC-Explorer: A Parameterized VLIW-based Platform Framework for Design Space Exploration
— The constant increase in levels of integration and the reduction of the time-to-market have led to the definition of new methodologies stressing reuse. This involves not only ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
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ICCAD
2002
IEEE
100views Hardware» more  ICCAD 2002»
15 years 4 months ago
Optimal buffered routing path constructions for single and multiple clock domain systems
Shrinking process geometries and the increasing use of IP components in SoC designs give rise to new problems in routing and buffer insertion. A particular concern is that cross-c...
Soha Hassoun, Charles J. Alpert, Meera Thiagarajan
ASPDAC
2000
ACM
107views Hardware» more  ASPDAC 2000»
15 years 4 months ago
Taiwan foundry for system-in-package (SIP)
-- System-In-Package (SIP) is a cost-effective alternative to System-On-Chip (SOC) and chips with embedded memory. The key elements of SIP technology include I/O redistribution, so...
Albert Lin
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
15 years 3 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...