Sciweavers

15 search results - page 3 / 3
» Microarchitectural power modeling techniques for deep sub-mi...
Sort
View
84
Voted
IISWC
2006
IEEE
15 years 4 months ago
Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks
Many embedded real world applications are intellectual property, and vendors hesitate to share these proprietary applications with computer architects and designers. This poses a ...
Ajay Joshi, Lieven Eeckhout, Robert H. Bell Jr., L...
83
Voted
ASPDAC
1995
ACM
104views Hardware» more  ASPDAC 1995»
15 years 1 months ago
Power analysis of a 32-bit embedded microcontroller
A new approach for power analysis of microprocessorshas recently been proposed [1]. The idea is to look at the power consumption in a microprocessor from the point of view of the ...
Vivek Tiwari, Mike Tien-Chien Lee
77
Voted
PATMOS
2007
Springer
15 years 4 months ago
Exploiting Input Variations for Energy Reduction
The deep submicron semiconductor technologies will make the worst-case design impossible, since they can not provide design margins that it requires. Research directions should go ...
Toshinori Sato, Yuji Kunitake
85
Voted
ISPASS
2009
IEEE
15 years 5 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
78
Voted
MICRO
1996
IEEE
96views Hardware» more  MICRO 1996»
15 years 2 months ago
Exceeding the Dataflow Limit via Value Prediction
For decades, the serialization constraints imposed by true data dependences have been regarded as an absolute limit--the dataflow limit--on the parallel execution of serial progra...
Mikko H. Lipasti, John Paul Shen