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77
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DAC
2005
ACM
16 years 2 months ago
Microarchitecture-aware floorplanning using a statistical design of experiments approach
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...
ASPDAC
2006
ACM
146views Hardware» more  ASPDAC 2006»
15 years 7 months ago
A fixed-die floorplanning algorithm using an analytical approach
— Fixed-die floorplanning is an important problem in the modern physical design process. An effective floorplanning algorithm is crucial to improving both the quality and the t...
Yong Zhan, Yan Feng, Sachin S. Sapatnekar
109
Voted
DAC
2001
ACM
16 years 2 months ago
Latency-Driven Design of Multi-Purpose Systems-On-Chip
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
Seapahn Meguerdichian, Milenko Drinic, Darko Kirov...
97
Voted
ICCAD
2004
IEEE
145views Hardware» more  ICCAD 2004»
15 years 10 months ago
Accurate estimation of global buffer delay within a floorplan
Closed formed expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anyw...
Charles J. Alpert, Jiang Hu, Sachin S. Sapatnekar,...
168
Voted

Publication
220views
17 years 23 days ago
Exploiting the Impact of Database System Configuration Parameters: A Design of Experiments Approach
Tuning database system configuration parameters to proper values according to the expected query workload plays a very important role in determining DBMS performance. However, the ...
Biplob K. Debnath, Mohamed F. Mokbel, David J. Lil...