Sciweavers

1165 search results - page 28 / 233
» Middleware in Modern High Performance Computing System Archi...
Sort
View
134
Voted
DATE
2009
IEEE
242views Hardware» more  DATE 2009»
15 years 10 months ago
A high performance reconfigurable Motion Estimation hardware architecture
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available high definition frame sizes and hi...
Ozgur Tasdizen, Halil Kukner, Abdulkadir Akin, Ilk...
120
Voted
WETICE
2005
IEEE
15 years 9 months ago
GRACE: Enabling collaborations in wide-area distributed systems
The globalization of businesses and the cooperation between organizations have brought on an ever increased need for providing support for distributed collaborations. In this pape...
Anne-Marie Bosneag, Monica Brockmeyer
124
Voted
PPOPP
2005
ACM
15 years 9 months ago
Fault tolerant high performance computing by a coding approach
As the number of processors in today’s high performance computers continues to grow, the mean-time-to-failure of these computers are becoming significantly shorter than the exe...
Zizhong Chen, Graham E. Fagg, Edgar Gabriel, Julie...
134
Voted
DAC
2001
ACM
16 years 4 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...
141
Voted
IPPS
2005
IEEE
15 years 9 months ago
MegaProto: A Low-Power and Compact Cluster for High-Performance Computing
“MegaProto” is a proof-of-concept prototype for our project “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, implementing our key idea that a mi...
Hiroshi Nakashima, Hiroshi Nakamura, Mitsuhisa Sat...