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» Minimization and Partitioning Method Reducing Input Sets
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ENGL
2007
180views more  ENGL 2007»
14 years 11 months ago
Reordering Algorithm for Minimizing Test Power in VLSI Circuits
— Power consumption has become a crucial concern in Built In Self Test (BIST) due to the switching activity in the circuit under test(CUT). In this paper we present a novel metho...
K. Paramasivam, K. Gunavathi
ASMTA
2010
Springer
192views Mathematics» more  ASMTA 2010»
14 years 9 months ago
Packet Loss Minimization in Load-Balancing Switch
Due to the overall growing demand on the network resources and tight restrictions on the power consumption, the requirements to the long-term scalability, cost and performance capa...
Yury Audzevich, Levente Bodrog, Yoram Ofek, Mikl&o...
ASPDAC
2004
ACM
97views Hardware» more  ASPDAC 2004»
15 years 5 months ago
Interconnect design methods for memory design
- This paper presents a solution to the problem of designing interconnects for memory devices. More precisely, it solves the automatic routing problem of memory peripheral circuits...
Chanseok Hwang, Massoud Pedram
AAAI
1997
15 years 1 months ago
Model Minimization in Markov Decision Processes
Many stochastic planning problems can be represented using Markov Decision Processes (MDPs). A difficulty with using these MDP representations is that the common algorithms for so...
Thomas Dean, Robert Givan
ICCV
2011
IEEE
13 years 11 months ago
Optimizing Polynomial Solvers for Minimal Geometry Problems
In recent years polynomial solvers based on algebraic geometry techniques, and specifically the action matrix method, have become popular for solving minimal problems in computer...
Oleg Naroditsky, Kostas Daniilidis