1008 search results - page 108 / 202 » Minimizing Average Flow-Time |
100
Voted
ICCD
2007
IEEE
15 years 4 months ago
2007
IEEE
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
89
Voted
FPGA
2006
ACM
15 years 4 months ago
2006
ACM
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
103
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ESA
2000
Springer
15 years 4 months ago
2000
Springer
The p-center problem is to locate p facilities on a network so as to minimize the largest distance from a demand point to its nearest facility. The p-median problem is to locate p ...
108
Voted
VL
1995
IEEE
15 years 4 months ago
1995
IEEE
Buffering of intermediate results in dataflow diagrams can significantly reduce latency when a user browses these results or re-executes a diagram with slightly different inputs. ...
106
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EVOW
2008
Springer
15 years 2 months ago
2008
Springer
We introduce the concept of "minimal" search algorithm for a set of functions to optimize. We investigate the structure of closed under permutation (c.u.p.) sets and we c...