Sciweavers

1008 search results - page 195 / 202
» Minimizing Average Flow-Time
Sort
View
85
Voted
APCSAC
2003
IEEE
15 years 3 months ago
Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
Pradeep Rao, S. K. Nandy, M. N. V. Satya Kiran
110
Voted
CODES
2001
IEEE
15 years 3 months ago
Hybrid global/local search strategies for dynamic voltage scaling in embedded multiprocessors
In this paper, we explore a hybrid global/local search optimization framework for dynamic voltage scaling in embedded multiprocessor systems. The problem is to find, for a multipr...
Neal K. Bambha, Shuvra S. Bhattacharyya, Jürg...
126
Voted
USS
2008
15 years 2 months ago
CloudAV: N-Version Antivirus in the Network Cloud
Antivirus software is one of the most widely used tools for detecting and stopping malicious and unwanted files. However, the long term effectiveness of traditional hostbased anti...
Jon Oberheide, Evan Cooke, Farnam Jahanian
ASPLOS
2008
ACM
15 years 1 months ago
Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on CMPs
Extracting high-performance from the emerging Chip Multiprocessors (CMPs) requires that the application be divided into multiple threads. Each thread executes on a separate core t...
M. Aater Suleman, Moinuddin K. Qureshi, Yale N. Pa...
CASES
2008
ACM
15 years 1 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...