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WCRE
2000
IEEE
15 years 8 months ago
E/R Schema for the Datrix C/C++/Java Exchange Format
A SEF (software exchange format), such as GXL [6], TA [4] or RSF [7], is used to exchange data between tools that analyze software. Researchers at Bell Canada have specified the D...
Richard C. Holt, Ahmed E. Hassan, Bruno Laguë...
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 1 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
JCO
2011
115views more  JCO 2011»
14 years 11 months ago
Approximation scheme for restricted discrete gate sizing targeting delay minimization
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
Chen Liao, Shiyan Hu

Book
1575views
16 years 11 months ago
Bison - The Yacc-compatible Parser Generator
"Bison is a general-purpose parser generator that converts an annotated context-free grammar into an LALR(1) or GLR parser for that grammar. Once you are proficient with Biso...
Charles Donnelly and Richard Stallman
IFL
2005
Springer
107views Formal Methods» more  IFL 2005»
15 years 9 months ago
With-Loop Fusion for Data Locality and Parallelism
With-loops are versatile array comprehensions used in the functional array language SaC to implement universally applicable array operations. We describe the fusion of with-loops a...
Clemens Grelck, Karsten Hinckfuß, Sven-Bodo ...