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ARC
2008
Springer
112views Hardware» more  ARC 2008»
15 years 4 days ago
Optimal Unroll Factor for Reconfigurable Architectures
Abstract. Loops are an important source of optimization. In this paper, we address such optimizations for those cases when loops contain kernels mapped on reconfigurable fabric. We...
Ozana Silvia Dragomir, Elena Moscu Panainte, Koen ...
ASPLOS
2008
ACM
15 years 4 days ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
89
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ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
15 years 3 days ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
ISSTA
2010
ACM
15 years 2 days ago
Analysis of invariants for efficient bounded verification
SAT-based bounded verification of annotated code consists of translating the code together with the annotations to a propositional formula, and analyzing the formula for specifica...
Juan P. Galeotti, Nicolás Rosner, Carlos L&...
DNA
2006
Springer
130views Bioinformatics» more  DNA 2006»
15 years 2 days ago
Displacement Whiplash PCR: Optimized Architecture and Experimental Validation
Whiplash PCR-based methods of biomolecular computation (BMC), while highly-versatile in principle, are well-known to suffer from a simple but serious form of self-poisoning known a...
John A. Rose, Ken Komiya, Satsuki Yaegashi, Masami...
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