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JISE
1998
106views more  JISE 1998»
15 years 4 months ago
Control / Data-Flow Analysis for VHDL Semantic Extraction
straction reduces the number of states necessary to perform formal verification while maintaining the functionality of the original model with respect to ifications to be verified....
Yee-Wing Hsieh, Steven P. Levitan
UML
2001
Springer
15 years 9 months ago
Designing Procedural 4GL Applications through UML Modeling
: This paper presents a Unified Modeling Language (UML) model for VisualAge Generator (VG) business-oriented applications. This model was defined to bridge between two different mo...
Shiri Davidson, Mila Keren, Sara Porat, Gabi Zodik
DAC
1998
ACM
16 years 5 months ago
Approximation and Decomposition of Binary Decision Diagrams
Efficient techniques for the manipulation of Binary Decision Diagrams (BDDs) are key to the success of formal verification tools. Recent advances in reachability analysis and mode...
Kavita Ravi, Kenneth L. McMillan, Thomas R. Shiple...
CDC
2008
IEEE
127views Control Systems» more  CDC 2008»
15 years 11 months ago
Symmetry reduction for stochastic hybrid systems
This paper is focused on adapting symmetry reduction, a technique that is highly successful in traditional model checking, to stochastic hybrid systems. To that end, we first sho...
Manuela L. Bujorianu, Joost-Pieter Katoen
RTSS
2008
IEEE
15 years 11 months ago
Symbolic Computation of Schedulability Regions Using Parametric Timed Automata
In this paper, we address the problem of symbolically computing the region in the parameter’s space that guarantees a feasible schedule, given a set of real-time tasks character...
Alessandro Cimatti, Luigi Palopoli, Yusi Ramadian