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KBSE
2007
IEEE
15 years 11 months ago
Sequential circuits for program analysis
A number of researchers have proposed the use of Boolean satisfiability solvers for verifying C programs. They encode correctness checks as Boolean formulas using finitization: ...
Fadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid
ATVA
2004
Springer
138views Hardware» more  ATVA 2004»
15 years 8 months ago
Providing Automated Verification in HOL Using MDGs
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a veri...
Tarek Mhamdi, Sofiène Tahar
ATVA
2010
Springer
284views Hardware» more  ATVA 2010»
15 years 6 months ago
YAGA: Automated Analysis of Quantitative Safety Specifications in Probabilistic B
Probabilistic B (pB) [2, 8] extends classical B [7] to incorporate probabilistic updates together with the specification of quantitative safety properties. As for classical B, prob...
Ukachukwu Ndukwu, A. K. McIver
TSMC
2010
14 years 11 months ago
Active Learning of Plans for Safety and Reachability Goals With Partial Observability
Traditional planning assumes reachability goals and/or full observability. In this paper, we propose a novel solution for safety and reachability planning with partial observabilit...
Wonhong Nam, Rajeev Alur
FORMATS
2005
Springer
15 years 10 months ago
Diagonal Constraints in Timed Automata: Forward Analysis of Timed Systems
Timed automata (TA) are a widely used model for real-time systems. Several tools are dedicated to this model, and they mostly implement a forward analysis for checking reachability...
Patricia Bouyer, François Laroussinie, Pier...