12981 search results - page 520 / 2597 » Model Checking (Abstract) |
166
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CASCON
1997
15 years 7 months ago
1997
Understanding distributed applications is a tedious and di cult task. Visualizations based on process-time diagrams are often used to obtain a better understanding of the executio...
100
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
This paper describes a strategy for verifying data-hazard correctness of out-of-order processors that implement register-renaming. We define a set of predicates to characterize re...
140
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ICCAD
2004
IEEE
16 years 3 months ago
2004
IEEE
This paper presents a chip-level charged device model (CDM) electrostatic discharge (ESD) simulation method. The chip-level simulation is formulated as a DC analysis problem. A ne...
158
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FSTTCS
2007
Springer
16 years 9 days ago
2007
Springer
We examine a bidirectional Propositional Dynamic Logic (PDL) for message sequence charts (MSCs) extending LTL and TLC− . Every formula is translated into an equivalent communicat...
181
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STACS
2007
Springer
16 years 8 days ago
2007
Springer
Hybrid logics extend modal logics by first-order concepts, in particular they allow a limited use of variables. Unfortunately, in general, satisfiability for hybrid formulas is u...