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» Model Checking C Programs Using F-SOFT
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121
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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 12 days ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
ASPLOS
2010
ACM
15 years 9 months ago
The Scalable Heterogeneous Computing (SHOC) benchmark suite
Scalable heterogeneous computing systems, which are composed of a mix of compute devices, such as commodity multicore processors, graphics processors, reconfigurable processors, ...
Anthony Danalis, Gabriel Marin, Collin McCurdy, Je...
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
15 years 11 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
ICCAD
2005
IEEE
144views Hardware» more  ICCAD 2005»
15 years 11 months ago
An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications
— In this paper we propose an exact algorithm that maximizes the sharing of partial terms in Multiple Constant Multiplication (MCM) operations. We model this problem as a Boolean...
Paulo F. Flores, José C. Monteiro, Eduardo ...
193
Voted
ANCS
2011
ACM
14 years 2 months ago
ReClick - A Modular Dataplane Design Framework for FPGA-Based Network Virtualization
Network virtualization has emerged as a powerful technique to deploy novel services and experimental protocols over shared network infrastructures. Although recent research has hi...
Deepak Unnikrishnan, Justin Lu, Lixin Gao, Russell...