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» Model Checking Games for Branching Time Logics
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ATAL
2010
Springer
15 years 2 hour ago
Verifying agents with memory is harder than it seemed
ATL+ is a variant of alternating-time temporal logic that does not have the expressive power of full ATL , but still allows for expressing some natural properties of agents. It ha...
Nils Bulling, Wojciech Jamroga
ENTCS
2007
134views more  ENTCS 2007»
14 years 11 months ago
A Compact Linear Translation for Bounded Model Checking
We present a syntactic scheme for translating future-time LTL bounded model checking problems into propositional satisfiability problems. The scheme is similar in principle to th...
Paul B. Jackson, Daniel Sheridan
ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
15 years 3 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
ENTCS
2007
156views more  ENTCS 2007»
14 years 11 months ago
Bounded Model Checking with Parametric Data Structures
Bounded Model Checking (BMC) is a successful refutation method to detect errors in not only circuits and other binary systems but also in systems with more complex domains like ti...
Erika Ábrahám, Marc Herbstritt, Bern...
ATVA
2008
Springer
104views Hardware» more  ATVA 2008»
15 years 1 months ago
A Direct Algorithm for Multi-valued Bounded Model Checking
Multi-valued Model Checking is an extension of classical, two-valued model checking with multi-valued logic. Multi-valuedness has been proved useful in expressing additional inform...
Jefferson O. Andrade, Yukiyoshi Kameyama