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» Model Checking Games for Branching Time Logics
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GLVLSI
2009
IEEE
150views VLSI» more  GLVLSI 2009»
15 years 6 months ago
Contradictory antecedent debugging in bounded model checking
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
Daniel Große, Robert Wille, Ulrich Kühn...
KBSE
2009
IEEE
15 years 6 months ago
SMT-Based Bounded Model Checking for Embedded ANSI-C Software
Propositional bounded model checking has been applied successfully to verify embedded software but is limited by the increasing propositional formula size and the loss of structur...
Lucas Cordeiro, Bernd Fischer, João Marques...
WOA
2007
15 years 28 days ago
Declarative representation of curricula models: an LTL- and UML-based approach
Abstract—In this work, we present a constrained-based representation for specifying the goals of “course design”, that we call curricula model, and introduce a graphical lang...
Matteo Baldoni, Cristina Baroglio, Giuseppe Berio,...
IPPS
2003
IEEE
15 years 5 months ago
So Many States, So Little Time: Verifying Memory Coherence in the Cray X1
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
Dennis Abts, Steve Scott, David J. Lilja
ENTCS
2002
91views more  ENTCS 2002»
14 years 11 months ago
Interval Duration Logic: Expressiveness and Decidability
We investigate a variant of dense-time Duration Calculus which permits model checking using timed/hybrid automata. We define a variant of the Duration Calculus, called Interval Du...
Paritosh K. Pandya