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» Model Checking Games for Branching Time Logics
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SPIN
2000
Springer
15 years 1 months ago
Verification and Optimization of a PLC Control Schedule
Abstract. We report on the use of model checking techniques for both the verification of a process control program and the derivation of optimal control schedules. Most of this wor...
Ed Brinksma, Angelika Mader
FDL
2004
IEEE
15 years 1 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng
DEDS
2007
104views more  DEDS 2007»
14 years 9 months ago
Trellis Processes : A Compact Representation for Runs of Concurrent Systems
The unfolding of a concurrent system represents in a compact manner all possible runs of this system. Unfoldings are used in many applications, ranging from model-checking (offlin...
Eric Fabre
ICSE
2008
IEEE-ACM
15 years 10 months ago
A verification system for timed interval calculus
Timed Interval Calculus (TIC) is a highly expressive set-based notation for specifying and reasoning about embedded real-time systems. However, it lacks mechanical proving support...
Chunqing Chen, Jin Song Dong, Jun Sun 0001
DATE
2004
IEEE
142views Hardware» more  DATE 2004»
15 years 1 months ago
Eliminating False Positives in Crosstalk Noise Analysis
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...
Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Mal...