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» Model Checking Is Static Analysis of Modal Logic
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LOGCOM
2008
110views more  LOGCOM 2008»
15 years 3 months ago
Sum and Product in Dynamic Epistemic Logic
The Sum-and-Product riddle was first published in [Fre69]. We provide an overview on the history of the dissemination of this riddle through the academic and puzzle-math community...
Hans P. van Ditmarsch, Ji Ruan, Rineke Verbrugge
110
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SIGSOFT
2003
ACM
15 years 9 months ago
Evaluating and improving the automatic analysis of implicit invocation systems
Model checking and other finite-state analysis techniques have been very successful when used with hardware systems and less successful with software systems. It is especially di...
Jeremy S. Bradbury, Jürgen Dingel
159
Voted
IGPL
2006
130views more  IGPL 2006»
15 years 3 months ago
Verifying Temporal Heap Properties Specified via Evolution Logic
Abstract. This paper addresses the problem of establishing temporal properties of programs written in languages, such as Java, that make extensive use of the heap to allocate-and d...
Eran Yahav, Thomas W. Reps, Shmuel Sagiv, Reinhard...
125
Voted
FMSD
2006
119views more  FMSD 2006»
15 years 3 months ago
Feature interaction detection by pairwise analysis of LTL properties - A case study
A Promela specification and a set of temporal properties are developed for a basic call service with a number of features. The properties are expressed in the logic LTL. Interactio...
Muffy Calder, Alice Miller
164
Voted
ICST
2009
IEEE
15 years 1 months ago
Proving Functional Equivalence of Two AES Implementations Using Bounded Model Checking
Bounded model checking--as well as symbolic equivalence checking--are highly successful techniques in the hardware domain. Recently, bit-vector bounded model checkers like CBMC ha...
Hendrik Post, Carsten Sinz