381 search results - page 56 / 77 » Model Checking Is Static Analysis of Modal Logic |
ISQED
2006
IEEE
15 years 5 months ago
2006
IEEE
This paper is concerned with statically analyzing the susceptibility of arbitrary combinational circuits to single event upsets that are becoming a significant concern for reliabi...
111
click to vote
ENTCS
2007
14 years 11 months ago
2007
Narrowing was originally introduced to solve equational E-unification problems. It has also been recognized as a key mechanism to unify functional and logic programming. In both ...
DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...
86
Voted
CASES
2009
ACM
15 years 6 months ago
2009
ACM
Accurate estimation of the tick length of a synchronous program is essential for efficient and predictable implementations that are devoid of timing faults. The techniques to dete...
RTS
2008
14 years 11 months ago
2008
The aim of this paper is to show, how a multitasking application running under a real-time operating system compliant with an OSEK/VDX standard can be modeled by timed automata. Th...