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APSEC
2009
IEEE
13 years 4 months ago
A Formal Framework to Integrate Timed Security Rules within a TEFSM-Based System Specification
Abstract--Formal methods are very useful in software industry and are becoming of paramount importance in practical engineering techniques. They involve the design and the modeling...
Wissam Mallouli, Amel Mammar, Ana R. Cavalli
DLT
2009
13 years 4 months ago
Branching-Time Temporal Logics with Minimal Model Quantifiers
Abstract. Temporal logics are a well investigated formalism for the specification and verification of reactive systems. Using formal verification techniques, we can ensure the corr...
Fabio Mogavero, Aniello Murano
ICSE
1999
IEEE-ACM
13 years 10 months ago
A Practical Method for Verifying Event-Driven Software
Formal verification methods are used only sparingly in software development. The most successful methods to date are based on the use of model checking tools. To use such he user ...
Gerard J. Holzmann, Margaret H. Smith
CONCUR
1997
Springer
13 years 10 months ago
Modularity for Timed and Hybrid Systems
Abstract. In a trace-based world, the modular speci cation, veri cation, and control of live systems require each module to be receptive that is, each module must be able to meet i...
Rajeev Alur, Thomas A. Henzinger
ICNC
2005
Springer
13 years 11 months ago
Automatic Text Summarization Based on Lexical Chains
Abstract. The method of lexical chains is the first time introduced to generate summaries from Chinese texts. The algorithm which computes lexical chains based on the HowNet knowl...
Yanmin Chen, Xiaolong Wang, Guan Yi