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» Model Checking Operator Procedures
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71
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ISCAS
2008
IEEE
123views Hardware» more  ISCAS 2008»
15 years 7 months ago
A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop
—A 333MHz-1GHz all-digital multiphase delay-locked loop with precise multi-phase output has been designed with TSMC 130nm CMOS technology model. A modified binary search algorith...
Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chi...
123
Voted
ESWS
2005
Springer
15 years 6 months ago
RDFSculpt: Managing RDF Schemas Under Set-Like Semantics
The Semantic Web is an extension of the current Web in which information is given well-defined meaning to support effective data discovery and integration. The RDF framework is a...
Zoi Kaoudi, Theodore Dalamagas, Timos K. Sellis
SIGADA
2004
Springer
15 years 6 months ago
Comparative analysis of genetic algorithm implementations
Genetic Algorithms provide computational procedures that are modeled on natural genetic system mechanics, whereby a coded solution is “evolved” from a set of potential solutio...
Robert Soricone, Melvin Neville
84
Voted
DATE
2004
IEEE
144views Hardware» more  DATE 2004»
15 years 4 months ago
Smaller Two-Qubit Circuits for Quantum Communication and Computation
We show how to implement an arbitrary two-qubit unitary operation using any of several quantum gate libraries with small a priori upper bounds on gate counts. In analogy to librar...
Vivek V. Shende, Igor L. Markov, Stephen S. Bulloc...
AUTOMATICA
1999
145views more  AUTOMATICA 1999»
15 years 12 days ago
Control of systems integrating logic, dynamics, and constraints
This paper proposes a framework for modeling and controlling systems described by interdependent physical laws, logic rules, and operating constraints, denoted as mixed logical dy...
Alberto Bemporad, Manfred Morari