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» Model Checking Software at Compile Time
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DAC
2010
ACM
13 years 2 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
CAV
2003
Springer
188views Hardware» more  CAV 2003»
13 years 6 months ago
Thread-Modular Abstraction Refinement
odular Abstraction Refinement Thomas A. Henzinger1 , Ranjit Jhala1 , Rupak Majumdar1 , and Shaz Qadeer2 1 University of California, Berkeley 2 Microsoft Research, Redmond Abstract....
Thomas A. Henzinger, Ranjit Jhala, Rupak Majumdar,...
HIPEAC
2007
Springer
13 years 6 months ago
Efficient Program Power Behavior Characterization
Fine-grained program power behavior is useful in both evaluating power optimizations and observing power optimization opportunities. Detailed power simulation is time consuming and...
Chunling Hu, Daniel A. Jiménez, Ulrich Krem...
CASES
2010
ACM
13 years 19 days ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
FM
2006
Springer
172views Formal Methods» more  FM 2006»
13 years 6 months ago
The Embedded Systems Design Challenge
We summarize some current trends in embedded systems design and point out some of their characteristics, such as the chasm between analytical and computational models, and the gap ...
Thomas A. Henzinger, Joseph Sifakis