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ISVLSI
2007
IEEE
131views VLSI» more  ISVLSI 2007»
15 years 7 months ago
Improving the Quality of Bounded Model Checking by Means of Coverage Estimation
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
Ulrich Kühne, Daniel Große, Rolf Drechs...
116
Voted
ICTAC
2005
Springer
15 years 6 months ago
Symbolic Model Checking of Finite Precision Timed Automata
Abstract. This paper introduces the notion of finite precision timed automata (FPTAs) and proposes a data structure to represent its symbolic states. To reduce the state space, FP...
Rongjie Yan, Guangyuan Li, Zhisong Tang
96
Voted
CAV
2004
Springer
87views Hardware» more  CAV 2004»
15 years 6 months ago
GSTE Is Partitioned Model Checking
Verifying whether an ω-regular property is satisfied by a finite-state system is a core problem in model checking. Standard techniques build an automaton with the complementary ...
Roberto Sebastiani, Eli Singerman, Stefano Tonetta...
88
Voted
FM
1994
Springer
113views Formal Methods» more  FM 1994»
15 years 4 months ago
Abstract Model Checking of Infinite Specifications
Model Checking of Infinite Specifications Daniel Jackson School of Computer Science Carnegie Mellon University Pittsburgh, PA A new method for analyzing specifications in languages...
Daniel Jackson
BIRTHDAY
2010
Springer
15 years 27 days ago
Model Checking Programmable Router Configurations
Programmable networks offer the ability to customize router behaviour at run time, thus providing new levels of flexibility for network administrators. We have developed a program...
Luca Zanolin, Cecilia Mascolo, Wolfgang Emmerich