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GLVLSI
2006
IEEE
95views VLSI» more  GLVLSI 2006»
15 years 5 months ago
Test generation using SAT-based bounded model checking for validation of pipelined processors
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
Heon-Mo Koo, Prabhat Mishra
FATES
2004
Springer
15 years 4 months ago
Using Model Checking for Reducing the Cost of Test Generation
This paper presents a method for reducing the cost of test generation. A spanning set for a coverage criterion is a set of entities such that exercising every entity in the spannin...
Hyoung Seok Hong, Hasan Ural
HYBRID
2003
Springer
15 years 4 months ago
Model Checking LTL over Controllable Linear Systems Is Decidable
Abstract. The use of algorithmic verification and synthesis tools for hybrid systems is currently limited to systems exhibiting simple continuous dynamics such as timed automata o...
Paulo Tabuada, George J. Pappas
CONCUR
2000
Springer
15 years 2 months ago
Model Checking with Finite Complete Prefixes Is PSPACE-Complete
Unfoldings are a technique for verification of concurrent and distributed systems introduced by McMillan. The method constructs a finite complete prefix, which can be seen as a sym...
Keijo Heljanko
CORR
2006
Springer
124views Education» more  CORR 2006»
14 years 11 months ago
Linear Encodings of Bounded LTL Model Checking
Abstract. We consider the problem of bounded model checking (BMC) for linear temporal logic (LTL). We present several efficient encodings that have size linear in the bound. Furthe...
Armin Biere, Keijo Heljanko, Tommi A. Junttila, Ti...