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RSP
2003
IEEE
132views Control Systems» more  RSP 2003»
15 years 9 months ago
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
ISSTA
2009
ACM
15 years 11 months ago
Specifying the worst case: orthogonal modeling of hardware errors
During testing, the execution of valid cases is only one part of the task. Checking the behavior in boundary situations and in the presence of errors is an equally important subje...
Jewgenij Botaschanjan, Benjamin Hummel
DAC
2002
ACM
16 years 5 months ago
Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver
We propose Satisfiability Checking (SAT) techniques that lead to a consistent performance improvement of up to 3x over state-ofthe-art SAT solvers like Chaff on important problem ...
Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao ...
SIGSOFT
2003
ACM
16 years 5 months ago
Deadline analysis of interrupt-driven software
Real-time, reactive, and embedded systems are increasingly used throughout society (e.g., flight control, railway signaling, vehicle management, medical devices, and many others)....
Dennis Brylow, Jens Palsberg
ENTCS
2010
141views more  ENTCS 2010»
15 years 4 months ago
Debugging as a Science, that too, when your Program is Changing
Program debugging is an extremely time-consuming process, and it takes up a large portion of software development time. In practice, debugging is still very much of an art, with t...
Abhik Roychoudhury