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CODES
2003
IEEE
15 years 10 months ago
A modular simulation framework for architectural exploration of on-chip interconnection networks
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
Tim Kogel, Malte Doerper, Andreas Wieferink, Raine...
180
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ICEIS
2000
IEEE
15 years 9 months ago
Architectural Considerations with Distributed Computing
We understand distributed systems as a collection of distributed computation resources that work together as one harmonious system. It is the great achievement of computer network...
Yibing Wang, Robert M. Hyatt, Barrett R. Bryant
SIGSOFT
2009
ACM
16 years 5 months ago
Supporting automatic model inconsistency fixing
Modern development environments often involve models with complex consistency relations. Some of the relations can be automatically established through "fixing procedures&quo...
Yingfei Xiong, Zhenjiang Hu, Haiyan Zhao, Hui Song...
KBSE
2007
IEEE
15 years 11 months ago
Scalable automatic test data generation from modeling diagrams
We explore the automatic generation of test data that respect constraints expressed in the Object-Role Modeling (ORM) language. ORM is a popular conceptual modeling language, prim...
Yannis Smaragdakis, Christoph Csallner, Ranjith Su...
ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
15 years 11 months ago
An SPU reference model for simulation, random test generation and verification
– An instruction set level reference model was developed for the development of synergistic processing unit (SPU) , which is one of the key components of the cell processor [1][2...
Yukio Watanabe, Balazs Sallay, Brad W. Michael, Da...