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ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
15 years 1 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
SIGSOFT
2007
ACM
15 years 10 months ago
The symmetry of the past and of the future: bi-infinite time in the verification of temporal properties
Model checking techniques have traditionally dealt with temporal logic languages and automata interpreted over -words, i.e., infinite in the future but finite in the past. However...
Matteo Pradella, Angelo Morzenti, Pierluigi San Pi...
ENTCS
2006
114views more  ENTCS 2006»
14 years 9 months ago
Prototyping SOS Meta-theory in Maude
We present a prototype implementation of SOS meta-theory in the Maude term rewriting language. The prototype defines the basic concepts of SOS meta-theory (e.g., transition formul...
Mohammad Reza Mousavi, Michel A. Reniers
AGENTS
2001
Springer
15 years 2 months ago
Representing social structures in UML
From a software engineering perspective, agent systems are a specialization of object-oriented (OO) systems, in which individual objects have their own threads of control and thei...
H. Van Dyke Parunak, James Odell
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DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 1 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...