In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Abstract--This paper focuses on data structures for multicore reachability, which is a key component in model checking algorithms and other verification methods. A cornerstone of a...
Alfons Laarman, Jaco van de Pol, Michael Weber 000...
We propose a new verification method for temporal properties of higher-order functional programs, which takes advantage of Ong's recent result on the decidability of the mode...
—Practical software verification is dominated by two major classes of techniques. The first is model checking, which provides total precision, but suffers from the state space ...
Daniel Kroening, Natasha Sharygina, Stefano Tonett...
We use History Dependent Automata (HD-automata) as a syntax-indepentend formalism to check compatibility of services at binding time in Service-Oriented Computing. Informally speak...
Vincenzo Ciancia, Gian Luigi Ferrari, Marco Pistor...