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ISCA
2007
IEEE
145views Hardware» more  ISCA 2007»
15 years 11 months ago
Mechanisms for store-wait-free multiprocessors
Store misses cause significant delays in shared-memory multiprocessors because of limited store buffering and ordering constraints required for proper synchronization. Today, prog...
Thomas F. Wenisch, Anastassia Ailamaki, Babak Fals...
148
Voted
CCS
2007
ACM
15 years 10 months ago
Managing RBAC states with transitive relations
In this paper, we study the maintenance of role-based access control (RBAC) models in database environments using transitive closure relations. In particular, the algorithms that ...
Chaoyi Pang, David P. Hansen, Anthony J. Maeder
153
Voted
COREGRID
2007
Springer
15 years 10 months ago
Total Exchange Performance Prediction on Grid Environments
One of the most important collective communication patterns used in scientific applications is the complete exchange, also called All-to-All. Although efficient algorithms have b...
Luiz Angelo Steffenel, Emmanuel Jeannot
LCN
2005
IEEE
15 years 10 months ago
Differentiation of Downlink 802.11e Traffic in the Virtual Collision Handler
— A number of analytical models have been proposed to describe the priority schemes of the Enhanced Distributed Channel Access (EDCA) mechanism of the IEEE 802.11e standard. EDCA...
Paal Engelstad, Olav N. Østerbø
IWANN
2005
Springer
15 years 10 months ago
Characterizing Self-developing Biological Neural Networks: A First Step Towards Their Application to Computing Systems
Carbon nanotubes are often seen as the only alternative technology to silicon transistors. While they are the most likely short-term alternative, other longer-term alternatives sho...
Hugues Berry, Olivier Temam
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