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GTTSE
2007
Springer
15 years 3 months ago
Model Transformations for the Compilation of Multi-processor Systems-on-Chip
With the increase of amount of transistors which can be contained on a chip and the constant expectation for more sophisticated applications, the design of Systems-on-Chip (SoC) is...
Éric Piel, Philippe Marquet, Jean-Luc Dekey...
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
15 years 6 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
SSDBM
2002
IEEE
149views Database» more  SSDBM 2002»
15 years 2 months ago
A Cost Model for Interval Intersection Queries on RI-Trees
The efficient management of interval data represents a core requirement for many temporal and spatial database applications. With the Relational Interval Tree (RI-tree1 ), an effi...
Hans-Peter Kriegel, Martin Pfeifle, Marco Pöt...
MTV
2003
IEEE
109views Hardware» more  MTV 2003»
15 years 3 months ago
A Methodology for Validation of Microprocessors using Equivalence Checking
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Nikil D. Dutt
WSC
1998
14 years 11 months ago
MPI-SIM: Using Parallel Simulation to Evaluate MPI Programs
This paper describes the design and implementation of MPI-SIM, a library for the execution driven parallel simulation of MPI programs. MPI-LITE, a portable library that supports m...
Sundeep Prakash, Rajive Bagrodia