756 search results - page 93 / 152 » Model Order Reduction for Nonlinear IC Models |
VLSM
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. In this paper we propose a novel variational technique for the knowledge based segmentation of two dimensional objects. One of the elements of our approach is the use of ...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery s...
BMCBI
2005
14 years 9 months ago
2005
Background: Graph theory provides a computational framework for modeling a variety of datasets including those emerging from genomics, proteomics, and chemical genetics. Networks ...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
GTTSE
2007
Springer
15 years 3 months ago
2007
Springer
With the increase of amount of transistors which can be contained on a chip and the constant expectation for more sophisticated applications, the design of Systems-on-Chip (SoC) is...