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» Model Reuse through Hardware Design Patterns
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WOTUG
2007
14 years 11 months ago
A Process-Oriented Architecture for Complex System Modelling
Abstract. A fine-grained massively-parallel process-oriented model of platelets (potentially artificial) within a blood vessel is presented. This is a CSP inspired design, expres...
Carl G. Ritson, Peter H. Welch
TCSV
2008
195views more  TCSV 2008»
14 years 9 months ago
Locality Versus Globality: Query-Driven Localized Linear Models for Facial Image Computing
Conventional subspace learning or recent feature extraction methods consider globality as the key criterion to design discriminative algorithms for image classification. We demonst...
Yun Fu, Zhu Li, Junsong Yuan, Ying Wu, Thomas S. H...
ITC
2003
IEEE
134views Hardware» more  ITC 2003»
15 years 3 months ago
Effectiveness Improvement of ECR Tests
Energy Consumption Ratio (ECR) test, a current-based test, has shown its ability to reduce the impact of process variations and detect hard-to-detect faults. The effectiveness of ...
Wanli Jiang, Erik Peterson, Bob Robotka
MAM
2007
113views more  MAM 2007»
14 years 9 months ago
A reconfigurable computing framework for multi-scale cellular image processing
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...
Reid B. Porter, Jan R. Frigo, Al Conti, Neal R. Ha...
ASPDAC
2004
ACM
114views Hardware» more  ASPDAC 2004»
15 years 3 months ago
Layer assignment for crosstalk risk minimization
— In ultra-deep submicron technology, crosstalk noise is so severe that crosstalk avoidance merely in detailed routing is not adequate and it has to be considered in earlier desi...
Di Wu, Jiang Hu, Rabi N. Mahapatra, Min Zhao