733 search results - page 116 / 147 » Model Reuse through Hardware Design Patterns |
107
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WSC
2004
15 years 2 months ago
2004
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
133
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HPCA
1998
IEEE
15 years 5 months ago
1998
IEEE
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
117
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SIGSOFT
2005
ACM
16 years 2 months ago
2005
ACM
Growing attention is being paid to application security at requirements engineering time. Confidentiality is a particular subclass of security concerns that requires sensitive inf...
104
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DAC
2008
ACM
16 years 2 months ago
2008
ACM
This paper discusses the use of networks-on-chip (NoCs) consisting of multiple voltage-frequency islands to cope with power consumption, clock distribution and parameter variation...
ISCAS
2005
IEEE
15 years 6 months ago
2005
IEEE
We propose an analog current-mode subthreshold CMOS circuit implementing a neuromorphic oscillator. Our circuit is based on the half-center oscillator model proposed by Matsuoka, ...