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» Model Reuse through Hardware Design Patterns
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ICCAD
2003
IEEE
325views Hardware» more  ICCAD 2003»
15 years 2 months ago
Hardware Scheduling for Dynamic Adaptability using External Profiling and Hardware Threading
While performance, area, and power constraints have been the driving force in designing current communication-enabled embedded systems, post-fabrication and run-time adaptability ...
Brian Swahn, Soha Hassoun
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
15 years 1 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
AI
2005
Springer
14 years 9 months ago
Bayesian network modelling through qualitative patterns
In designing a Bayesian network for an actual problem, developers need to bridge the gap between ematical abstractions offered by the Bayesian-network formalism and the features o...
Peter J. F. Lucas
ESM
2000
14 years 11 months ago
SEP: Simulation framework to evaluate digital hardware architectures
Know-how is the most useful mean for designing new processors before a complete hardware description. The integration rate is increasing very quickly and the timeto-market has to ...
Frédéric Mallet, Fernand Boér...
EUROMICRO
2007
IEEE
15 years 4 months ago
Compatibility and reuse in component-based systems via type and unit inference
In many branches of industry, the component-based approach to systems design is predominant, e. g., as in embedded control systems which are often modelled using MATLAB/Simulink. ...
Christian Kühnel, Andreas Bauer 0002, Michael...