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» Model Reuse through Hardware Design Patterns
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DAC
2006
ACM
15 years 3 months ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan
SIGCSE
2008
ACM
365views Education» more  SIGCSE 2008»
14 years 9 months ago
Computer science olympiad: exploring computer science through competition
Generating interest in specialized areas of Computer Science (CS) is one of the goals of the department of Computer and Information Science at Spelman College as with most departm...
Iretta B. C. Kearse, Charles Hardnett
ICSE
2003
IEEE-ACM
15 years 9 months ago
Patterns, Frameworks, and Middleware: Their Synergistic Relationships
The knowledge required to develop complex software has historically existed in programming folklore, the heads of experienced developers, or buried deep in the code. These locatio...
Douglas C. Schmidt, Frank Buschmann
CHI
2007
ACM
15 years 10 months ago
Authoring sensor-based interactions by demonstration with direct manipulation and pattern recognition
Sensors are becoming increasingly important in interaction design. Authoring a sensor-based interaction comprises three steps: choosing and connecting the appropriate hardware, cr...
Björn Hartmann, Leith Abdulla, Manas Mittal, ...
DATE
2009
IEEE
86views Hardware» more  DATE 2009»
15 years 4 months ago
A formal approach to design space exploration of protocol converters
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
Karin Avnit, Arcot Sowmya