733 search results - page 44 / 147 » Model Reuse through Hardware Design Patterns |
FPL
2008
Springer
14 years 11 months ago
2008
Springer
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
106
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AHS
2006
IEEE
15 years 3 months ago
2006
IEEE
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
ISCA
2000
IEEE
15 years 1 months ago
2000
IEEE
High performance general-purpose processors are increasingly being used for a variety of application domains scienti c, engineering, databases, and more recently, media processing...
104
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VLDB
2005
ACM
15 years 3 months ago
2005
ACM
In this paper, we examine the performance of frequent pattern mining algorithms on a modern processor. A detailed performance study reveals that even the best frequent pattern min...
DSD
2002
IEEE
15 years 2 months ago
2002
IEEE
We discuss the gap we experience in an industrial design path of high-speed packet switches. As bandwidth demand exceeds progress in CMOS technology, system architects are forced ...