733 search results - page 51 / 147 » Model Reuse through Hardware Design Patterns |
DATE
2002
IEEE
15 years 2 months ago
2002
IEEE
In this paper, we study and implement a routabilitydriven floorplanner with buffer block planning. It evaluates the routability of a floorplan by computing the probability that ...
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BMCBI
2010
14 years 9 months ago
2010
Background: Microarray technology is a powerful and widely accepted experimental technique in molecular biology that allows studying genome wide transcriptional responses. However...
ISCAS
1999
IEEE
15 years 2 months ago
1999
IEEE
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
ICCD
2004
IEEE
15 years 6 months ago
2004
IEEE
This paper describes XTalkDelay, an industrial-strength methodology and tool for measuring the impact of crosstalk on delays of paths in a design. The main cornerstone of XTalkDel...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
In this paper we propose an embedded software design flow, which starts from an UML model and provides automatic mapping to other models like Simulink or finite-state machines (FS...