733 search results - page 64 / 147 » Model Reuse through Hardware Design Patterns |
ISCAS
2003
IEEE
15 years 3 months ago
2003
IEEE
Abstract - A comprehensive study of ultra high-speed currentmode logic (CML) buffers and regenerative CML latches will be illustrated. A new design procedure to systematically desi...
114
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CL
2008
Springer
14 years 9 months ago
2008
Springer
Currently available application frameworks that target the automatic design of real-time embedded software are poor in integrating functional and non-functional requirements for m...
WSC
2007
15 years 2 days ago
2007
Often the process and effort in building interoperable Command and Control (C2) systems and simulations can be arduous. Invariably the difficulty is in understanding what is inten...
EVOW
2008
Springer
14 years 11 months ago
2008
Springer
Abstract. Software configurable analogue arrays offer an intriguing platform for automated design by evolutionary algorithms. Like previous evolvable hardware experiments, these pl...
108
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WICSA
2004
14 years 11 months ago
2004
Early performance analysis based on Queueing Network Models (QNM) has been often proposed to support software designers during the software development process. These approaches a...